Nexus C9316D-GX and C93600CD-GX


front panel shows QSP-DD ports


front panel shows QSFP-DD ports

Announced 31 October 2018

The GX series appears to be a new spin of the LSE ASIC with more packet buffer memory. The data sheet refers to this memory as centralized which seems to imply that all the memory is accessable by all the ports. At this writing the switches are not yet orderable.

Orderable: Feb 2020 from itprice list history

Not withstanding the characterization of the memory as centralized, BRKDCN says that the ASIC has a slice architecture.

ASIC architecture diagram shows four slices