Founder Guy Hutchison talked about chip memory at the time of introduction.
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There's a huge amount of memory, but we.re not saying how
much -- it.s equal or better than [any existing switch chip].
It's like buffer memory, a large SRAM for arbitrary table
memory that can be carved up [as needed, and a] small T-CAM
for arbitrary range matching.
Now that products have started to flow, the memory size has been revealed: 24 MB.
At the end of 2017 Marvell and Cavium agreed to a $6B purchase that should close sometime in 2018.
On March 20 2018 Cavium introduced a trace program for their SOC switch products.
The acquision closed on July 6, 2018. At the end of August 2018 Marvell said they would be shuttering Cavium's Xpliant switch chip. The SONiC image has stopped supporting cavium asic in 2017/09. Because Marvell aborted this product line.