Allied Telesis responded to my question: "Do you have a switch based on Broadcom merchant silicon?" Answer: Yes. DC2552XS.

The data sheet shows 9 Mbytes of packet buffer memory -- hallmark of the Broadcom Trident+. The data sheet and the Users Manual are silent on how the buffer is allocated. I asked. The answer is in email from Josh Shalack, Allied Telesis Systems Engineer on August 21, 2013:

The initial buffer allocation currently has about 20% of the total buffer being shared out across the 64 by 10Gig ports, with the rest then being dynamically allocated to ports where queues fill up. At the moment there is no user control of these settings. At this stage there are no plans for larger buffers on our 10G switches. . . .

=== Of course, since the buffers are in the switch silicon, the buffers are what they are.

This is a layer 2 switch with IPv4 management protocols. Packet MTU is 12,288 bytes and cannot be changed. There is no routing and no IPv6 in the data sheet or the manual. LLDP (link layer discovery protocol) is also not part of the feature set. It has the ability to honor flow control pause frames, but does not send pause frames. No buffers are needed to give senders a window to pause since the request will never be made. Some Trident+ derivative switches have an FCoE feature set with Priority Flow Control. Allied Telesis does not. With that for a flow control feature set, 7 Mbytes in the dynamic buffer pool paints a consistent picture.

To be clear, flow control and QoS are not desirable features in a switch dropped into a Big Data transfer pathway. At our peril, we are looking at feature sets as guide posts to unstated internal design decisions.