switch beauty shot

2007 -- mentioned in a NetworkWorld article.

Several high energy physics sites selected these switches as the most cost-effective solution at the time. Some experiences with the 6248 are recounted on the Faster-Data web site. Dell has newer switches that are probably a better choice.

We have a Dell 6248 switch. During its boot sequence it finds and initializes two BCM56314_A0 devices. These are Broadcom switch ASICs that predate the Trident family. Each supports 24 Gig-E ports and higher speed uplinks. It is likely that the 6224 (24 port version of this product) would find only one BCM56314.

Dell has information that says each ASIC has 6.1 Mbit of packet buffer, so 0.75 MB. As with other multiple chip designs, the packet memory is available only for ports served from each ASIC. Dell does not claim dynamic buffer allocation.

Miercom did a comparative test of switches that included the 6248. Their method permits seeing the burst size available to a single port. They saw drops when the test burst exceeded 64 1518-byte frames. We'll take the Miercom result and assign 97 KB as the per-port buffer. Or maybe it is the per-port-per-queue buffer. Dell documentation does not explain how they divide buffer resources among queues. This is important because there is no CLI command to reduce the number of queues and hence coalesce packet memory to make more of it available to a single flow.

The Miercom important observation was that Cisco's custom ASIC dropped only the minimum number of packets in an overflow situation while the competition using Broadcom ASICs appeared to do a full buffer flush. The author of the Miercom report believes that this difference in behavior will mean the Cisco ASIC will perform better in a priority queuing environment. Perhaps. But for scientific computing, this is a whimpy buffer size in any case.

As a footnote, the Miercom study did not include jumbo frames.