Arista Tomahawk products

Arista has a raft of fixed configuration switches that span at least four generations of Broadcom Tomahawk silicon. In at least one case, Arista has built a switch using multiple Tomahawk silicon ASICs to drive the ports and some sort of switch fabric to interconnect them. This has side effects on both power consumption and the meaning of the amount of packet memory to buffer bursts.

To build a 64-port switch out of 32-port chips requires more chips than what might be apparent. You can't do it with just two: you need to save ports for internal use to connect to the fabric. You can use the same kind of silicon in the fabric and edges. And this is what Facebook did in their Backpack design. What this might look like is:

CLOS fabric switch interconnect to form a non-blocking switch

So, six chips are required to double the port count over a single Tomahawk. How much packet buffer should we say that this confabulation has? One Tomahawk has 16 MB and so Arista claims this to have 64 MB of packet memory. Why not 96 MB, accounting for the memory contributed by the pair of fabric chips? Fabrics all require some memory. Arista has not explained why they are not counting fabric memory in the buffer confab, but because the fabric is not flow-controlled to help with output port congestion it would seem a broad over-reach to include it in the accounting. In fabric based arrays if ports could borrow fabric buffers to help mediate bursts, the result would be head-of-line blocking. And that is fighting words. Even if it weren't technically preferred to have the core of the switch operate without flow control, you can be assured that the marketing dept finds great value in attaching the words non-blocking to their product descriptions.

Tomahawk has four switch cores, or some would say four slices. Each slice gets 4 MB of the packet memory. That means the maximum memory available to buffer a single flow is 4 MB, or probably 3 MB accounting for uses of packet memory that go beyond output buffering. It is correct for Arista to list this as 64 MB of packet memory, but far less than the total is available to a single flow for burst absorption. Here's the family lineup. Tomahawk3 (March 2018) is not included because Arista has no products.

Selected Arista switch specs in five columns

Note the high power consumption of the 7260CX-64. Most of the power in fixed configuration switches is used by the ASIC. This is a reliable indicator of a multi-ASIC product. The 7260QX-64 is a strange bird. It appears to be a BCM56970 with the SERDES speed fixed at 20 Gb/s, using two lanes for each 40 Gb/s port. This configuration would not be able to split a single QSFP port into 4 x 10 Gb/s.